@INPROCEEDINGS{1568540,
author={Zeineddini, A.S. and Gaj, K.},
booktitle={Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on},
title={Secure partial reconfiguration of FPGAs},
year={2005},
pages={155-162},
keywords={SRAM chips;cryptography;embedded systems;field programmable gate arrays;logic design;microprocessor chips;reconfigurable architectures;MicroBlaze soft processor core;PowerPC processor core;SRAM FPGA;Xilinx ML310 board;Xilinx Virtex-II Pro FPGA;bitstream authentication;bitstream encryption;embedded processor cores;secure dynamic partial reconfiguration;security breaches;Authentication;Batteries;Cloning;Cryptography;Embedded system;Field programmable gate arrays;Hardware;Power system security;Protection;Random access memory},
doi={10.1109/FPT.2005.1568540},}