@INPROCEEDINGS{782161,
author={Hong, I. and Potkonjak, M.},
booktitle={Design Automation Conference, 1999. Proceedings. 36th},
title={Behavioral synthesis techniques for intellectual property protection},
year={1999},
pages={849-854},
keywords={circuit CAD;data encapsulation;error correction codes;high level synthesis;industrial property;timing;CAD tools;ECC;allocation;author signature encoding;behavioral synthesis techniques;compilation tools;design constraints;dynamic watermarking technique;error correcting codes;intellectual property protection;metrics;reusable core components;reusable core-based design paradigm;scheduling assignment;signature data hiding;timing constraints;transformations;Data encapsulation;Design automation;Hardware;Intellectual property;Job shop scheduling;Permission;Productivity;Protection;Timing;Watermarking},
doi={10.1109/DAC.1999.782161},}