@INPROCEEDINGS{4101017,
author={Ziener, D. and Assmus, S. and Teich, J.},
booktitle={Field Programmable Logic and Applications, 2006. FPL '06. International Conference on},
title={Identifying FPGA IP-Cores Based on Lookup Table Content Analysis},
year={2006},
pages={1-6},
keywords={embedded systems;field programmable gate arrays;industrial property;logic design;security of data;table lookup;IP-core;Virtex-II Pro FPGA;Xilinx Virtex-II;lookup table content analysis;placement information;unlicensed usage;Computer science;Cryptography;Data mining;Data security;Embedded system;Field programmable gate arrays;Intellectual property;Protection;Table lookup;Watermarking},
doi={10.1109/FPL.2006.311255},}