lilian gros.JPGLilian Bossuet – Professor at University Jean Monnet, Saint-Etienne, France

 

 

Head of the Computer Science Departement of Hubert Curien Laboratory

Head of the Embedded System Security and Hardware Architecture group (web site)

Contact: lilian.bossuetarobaseuniv-st-etienne.fr // phone: +33(0)4 77 91 57 92

CV.pdf / short_CV.pdf / short_CV(in french).pdf / Publications (by type / by year)

Research

   Publications (by type / by year)

   Leader of the ANR Project SALWARE 2013-2018 (see the presentation of this project on the ANR web site in english or in french)

   Active research topics

-        Hardware security (including side channel analysis, crypto hardware implementation, SoC security ...)

-        PUF design, charaterization and security

-        War against illegal IC copy and counterfeiting (see my seminar online (in french))

-        IP protection (link the springer book co-edited by Prof. L. Torres and me)

-        MCryptoPSoC architecture and design

-        Crypto-processor architecture and design

-        Embedded system security

-        FPGA security

-        Sustainable electronics

   Previous research topics

-        Design space exploration of reconfigurable architecture (Ph.D. Thesis)

-        Reconfigurable system architecture and design

-        ADC design

Current Ph.D. Students

-        Fabien Majeric, Hardware attacks on embedded processor

-     Ugo Murredu, A complete framework for the development of physical unclonable functions

-     El Mehdi Benhani, Security evaluation of heterogenous and complex SoC

-     Damien Robissout, Hardware Security & Deep Learning

-     Julie Roux (in collaboration with INP Grenoble), Safety Evaluation of Aircraft Systems using Virtual Platforms

Ph.D. Graduates

-         Cedric Marchand, Salutary hardware design to fight against integrated circuit counterfeiting and theft (2017 Outstanding PhD Dissertation Award - Foundation of Jean Monnet Univesity )

-         Brice Colombier, IP Protection against illegal copy and cloning (2018 Outstanding PhD Dissertation Award - Lyon Univesity)

-        Pierre Bayon, Contactless Electromagnetic Active Attack on True Random Number Generator (2014)

-        Zouha Cherif, Design and Performance Evaluation of Silicon Physically Unclonable Function (2014)

-        Najeh Kamoun, Diffrential Power Analysis Countermeasure (2012)

-        Michael Grand, Reconfigurable Multi-Core Crypto-Processor for Software Radio (2011)

-        Nicolas Mechouck, BIST Structure for ADC (2010)

-        Vincent Fresnaud, INL Error Compensation for ADC (2008)

-        Maher Jridi, Mismatch Error Compensation for TIADC (2007)

Teaching

   At TELECOM Saint-Etienne, University Jean Monnet (Since 2011)

-        Hardware Security

-        Applied Cryptography

-        Digital System Design

At ENSEIB-MATEMCA, Bordeaux Institute of Technology (2005-2011)

-        Hardware Security

-        Digital System Design

-        Digital Signal Processing

-        Embbeded System Design

-        Computer Architecture

-        FPGA Architecture, Design and Use

-        FPGA for Digital Signal Processing

-        FPGA for Digital Communication

-        Low Power Design

Curriculum Vitae (CV.pdf / short_CV.pdf / short_CV(in french).pdf /publications (by type / by year))

Education

2010 – Accreditation to Supervise Research in Electrical Engineering (French HDR), University of Bordeaux, France

2004 – Ph.D. Thesis in Electrical Engineering, University of Bretagne-Sud, Lorient, France

2001 – M.Sc. Thesis in Electrical Engineering, INSA Rennes*, France (*top of his class)

2000 – Electrical Engineering Competitive Examination Training (French “agrégation”), ENS Cachan*, France (*top of his class)

1999 – Electrical Engineering Degree, ENSEA, Cergy-Pontoise, France

Professional experiences

2017/Today  Full Professor at University Jean Monnet Saint-Etienne, France

Part-time CNRS researcher (2017-2019)

Research activities at Laboratoire Hubert Curien

Teaching activities at Telecom Saint-Etienne

2010/2017  – Associate Professor at University Jean Monnet Saint-Etienne, France

Part-time CNRS researcher (2015-2017)

CNRS-University Chair of Applied Cryptography and Embedded System Security (2010-2015)

Research activities at Laboratoire Hubert Curien

Teaching activities at Telecom Saint-Etienne

2005/2010      – Associate Professor at Bordeaux Institute of Technology, France

Head of the Embedded System Department

Research activities at Laboratoire IMS (main area: crypto-processor architecture, IP protection, ADC design)

Teaching activities at ENSEIRB-MATMECA

Summer 2005– Invited Researcher at the University of Massachusetts, Amherst, USA

Research activities at VLSI Circuits and Systems Group (main area: FPGA security)

2004/2005      – Assistant Professor at University of South Brittany, France

Research activities at Lab-STICC (main area: reconfigurable system security)

Teaching activities at IUP Lorient

Summer 2003– Visiting Researcher at the University of Massachusetts, Amherst, USA

Research activities at VLSI Circuits and Systems Group (main area: reconfigurable architecture design)

2001/2004       – Ph.D. Student and Teaching Assistant at University of South Brittany, France

Research activities at Lab-STICC (main area: reconfigurable architecture design space exploration)

Teaching activities at IUP Lorient

2000/2001      – Teaching Assistant at University of Rennes, France

                            Teaching activities at IUT GEII Rennes